Micron to Launch HBM2 DRAM This Year: Finally
Bundled in their latest earnings call, Micron has revealed that later this year the company will finally introduce its first HBM DRAM for bandwidth-hungry applications. The move will enable the company to address the market for high-bandwidth devices such as flagship GPUs and network processors, which in the last five years have turned to HBM to meet their ever-growing bandwidth needs. And as the third and final of the "big three" memory manufacturers to enter the HBM market, this means that HBM2 memory will finally be available from all three companies, introducing a new wrinkle of competition into that market.
Overall, while Micron has remained on the cutting-edge of memory technologies, the company has been noticeably absent from HBM thus far. Previous efforts have instead focused on GDDR5X, as well as a different take on wide-and-slow memory with Hybrid Memory Cube (HMC). First announced back in 2011 as a joint effort with Samsung and IBM, HMC was a similar stacked DRAM type for bandwidth hungry applications, which featured a low-width bus & extremely high data rates to offer memory bandwidth that by far exceeded that of then-standard DDR3. As a competing solution to HBM, HMC did see some usage in the market, particularly in products like accelerators and supercomputers. Ultimately, however, HMC lost the battle against more widespread HBM/HBM2 and Micron folded the project in 2018 in favor of GDDR6 and HBM.
In the end, is has taken Micron around two years to develop its first HBM2 memory devices, and these will finally become available in 2020. Given the broad, financial nature of the call, Micron isn't disclosing the specifications of its first HBM2 devices at this time, though it is a safe bet that the underlying DRAM cells will be produced using the company’s 2nd or 3rd Generation 10 nm-class process technologies (1y or 1z). Meanwhile, Micron will obviously do its best to be competitive against Samsung and SK Hynix both in terms of performance and capacity.
Sanjay Mehrotra, president and chief executive officer, had the following to say:
“In FQ2, we began sampling 1Z-based DDR5 modules and are on track to introduce high-bandwidth memory in calendar 2020. We are also making good progress on our 1-alpha node.”
Related Reading:
- CES 2020: Micron Begins to Sample DDR5 RDIMMs with Server Partners
- JEDEC Updates HBM2 Memory Standard To 3.2 Gbps; Samsung's Flashbolt Memory Nears Production
- Micron’s DRAM Update: More Capacity, Four More 10nm-Class Nodes, EUV, 64 GB DIMMs
- Micron: Mass Production of 16 Gb DDR4 & LPDDR4X Chips Using 1z nm Technology
- Rambus Develops HBM2E Controller & PHY: 3.2 Gbps, 1024-Bit Bus
Source: Micron
from AnandTech https://ift.tt/2Jj9y6n
Post a Comment